Semiconductor nanowires have gained significant interest recently for their relevance to complementary metal-oxide-semiconductor (CMOS) scaling technology. Typically, previously condensed germanium nanowires are isolated from a substrate using either a wet etch undercut or through a silicon-on-insulator substrate. However, use of wet etch undercut in isolating the nanowires results in lifting lines. Further, the use of silicon-on-insulator substrate for isolating the nanowires is substantially expensive.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments of the claimed subject matter, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art. Accordingly, it is intended that the claimed subject matter be viewed broadly, and be defined only as set forth in the accompanying claims.